职位描述：
工作职责:
岗位职责：
1. responsible to digital module design, including specification writting, rtl code etc.
2. responsible to module verification, including test plan writing, test environment developing, test case creating and simulation.
3. assist with backend engineers on perform synthesis, timing analysis and pr of design.
任职资格:
1. good skill in verilog, systemverilog.
2. knowledge and experience with perl/tcl/makefile/shell scripts.
3. familiar with soc/mcu based on arm core.
4. familiar with amba bus protocol.
5. familiar with the peripherals (usb, ethenet, sdio, can, usart, spi, i2s, i2c, etc) of soc/mcu.
6. self-motivated and efficient to solving problems.
7. msee/ce with 3+ years of ic design experience.